R. Chen

Shanghai Jiao Tong University. No.800, Dongchuan Road, SEIEE Building 3-125, Minhang District, Shanghai, China.

I’m a second-year PhD student at Shanghai Jiao Tong University (SJTU), supervised by Prof.Xiaoyao Liang and Prof.Zhuoran Song. My research focuses on Computer Architecture, specifically graph processing and graph neural networks (GNNs). I have also conducted research on optimizing sparse matrix multiplication and improving irregular access through prefetching techniques.

news

Feb 15, 2025 Our paper “SAGA: A Memory-Efficient Accelerator for GANN Construction via Harnessing Vertex Similarity” has been accepted by DAC 2025 (CCF-A, First Author)!
Feb 07, 2025 Our paper “GIFTS: Efficient GCN Inference Framework on PyTorch-CPU via Exploring the Sparsity” has been accepted by IPDPS 2025 (CCF-B, First Author)!
Oct 23, 2023 Our paper “Differential-Matching Prefetcher for Indirect Memory Access” has been accepted by HPCA 2024 (CCF-A)!
Feb 17, 2023 Our paper “A Comprehensive Performance Model of Sparse Matrix-Vector Multiplication to Guide Kernel Optimization” has been accepted by TPDS 2022 (CCF-A)!
May 06, 2022 Mathematical Contest in Modeling (MCM) : Outstanding Winner (top 0.15%, globally), COMAP Scholarship Award (4 out of 27,205 teams, $3000 / person), AMS Award

selected publications

  1. TPDS
    A Comprehensive Performance Model of Sparse Matrix-Vector Multiplication to Guide Kernel Optimization
    Tian Xia, Gelin Fu, Chenyang Li, Zhongpei Luo, Lucheng Zhang, Ruiyang Chen, Wenzhe Zhao, Nanning Zheng, and Pengju Ren
    IEEE Transactions on Parallel and Distributed Systems, 2022
  2. HPCA
    Differential-Matching Prefetcher for Indirect Memory Access
    Gelin Fu, Tian Xia, Zhongpei Luo, Ruiyang Chen, Wenzhe Zhao, and Pengju Ren
    In The 30-th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024
  3. IPDPS
    GIFTS: Efficient GCN Inference Framework on PyTorch-CPU via Exploring the Sparsity
    Ruiyang Chen, Xing Li, Xiaoyao Liang, and Zhuoran Song
    In Proceedings of the IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2025
  4. DAC
    SAGA: A Memory-Efficient Accelerator for GANN Construction via Harnessing Vertex Similarity
    Ruiyang Chen, Xueyuan Liu, Chunyu Qi, Yuanzheng Yao, Yanan Sun, Xiaoyao Liang, and Zhuoran Song
    In Design Automation Conference (DAC), 2025